기치
범용 논리
| 그림 | PN | 설명 | 전압 범위 | 핀 개수 | 패키지 |
|---|---|---|---|---|---|
|
AiP74LVC2G125 | Dual Buffer/Line Driver; 3-State | 1.65 - 5.5 | 8 | TSSOP8/VSSOP8 |
|
AiP74LVC2G86 | Dual 2-Input Exclusive-Or Gate | 1.65 - 5.5 | 8 | TSSOP8/VSSOP8 |
|
AiP74LVC2G79 | Dual D-type Flip-Flop; Positive-Edge Trigger | 1.65 - 5.5 | 8 | TSSOP8/VSSOP8/XSON8 |
|
AiP74LVC2G74 | Single D-type flip-flop with set and reset；positive edge trigger | 1.65 - 5.5 | 8 | TSSOP8/VSSOP8 |
|
AiP74LVC2G38 | Dual 2-Input Nand Gate (Open-Drain) | 1.65 - 5.5 | 8 | TSSOP8/VSSOP8/XSON8 |
|
AiP74LVC2G34 | Dual Buffer | 1.65 - 5.5 | 6 | SOT23-6/SOT363 |
|
AiP74LVC2G32 | Dual 2-input Or Gate | 1.65 - 5.5 | 8 | TSSOP8/VSSOP8/XSON8 |
|
AiP74LVC2G17 | Dual Buffer Schmitt Trigger | 1.65 - 5.5 | 6 | SOT23-6/SOT363 |
|
AiP74LVC2G16 | Dual Buffer | 1.65 - 5.5 | 6 | SOT23-6/SOT363 |
|
AiP74LVC2G14 | Dual Inverter Schmitt Trigger | 1.65 - 5.5 | 6 | SOT23-6/SOT363/XSON6 |
|
AiP74LVC2G08 | Dual 2-input And Gate | 1.65 - 5.5 | 8 | TSSOP8/VSSOP8 |
|
AiP74LVC2G07 | Dual Buffer (Open-drain) | 1.65 - 5.5 | 6 | SOT-23-6/SOT-363/XSON6 |
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언어
IPv6 네트워크 지원