기치
Direct interface with TTL levels
| 그림 | PN | 설명 | 전압 범위 | 핀 개수 | 패키지 |
|---|---|---|---|---|---|
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|
AiP74LVC138 | 3-to-8 Line Decoder/Demultiplexer; Inverting | 1.2~5.5 | 16 | DIP16/SOP16/TSSOP16/DHVQFN16 |
-1779691248s5WpQi2bkz.jpg)
|
AiP74LVC32 | Quad 2-Input Or Gate | 1.2~5.5 | 14 | DIP14/SOP14/TSSOP14/VQFN14 |
-17796898849qLEGqie14.jpg)
|
AiP74LVC14 | Hex Inverting Schmitt Trigger | 1.2~5.5 | 14 | DIP14/SOP14/TSSOP14 |
-177968936994yogwfur0.jpg)
|
AiP74LVC08 | Quad 2-Input And Gate | 1.2~5.5 | 14 | DIP14/SOP14/TSSOP14/VQFN14/DHVQFN14 |
-1779688802kji7syVC34.jpg)
|
AiP74LVC07 | Hex Buffer with Open-Drain Outputs | 1.2~5.5 | 14 | DIP14/SOP14/TSSOP14/VQFN14 |
-1779686861QHQLNtRxrV.jpg)
|
AiP74LVC04 | Hex Inverter | 1.2~5.5 | 14 | DIP14/SOP14/TSSOP14/VQFN14 |
-1779684942sDNLMQRG0G.jpg)
|
AiP74LVC00 | Quad 2-input Nand Gate | 1.2~5.5 | 14 | DIP14/SOP14/TSSOP14 |
|
AiP74LVC2G125 | Dual Buffer/Line Driver; 3-State | 1.65 - 5.5 | 8 | TSSOP8/VSSOP8 |
|
AiP74LVC2G86 | Dual 2-Input Exclusive-Or Gate | 1.65 - 5.5 | 8 | TSSOP8/VSSOP8 |
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언어
IPv6 네트워크 지원